METHODS AND APPARATUS TO REDUCE INRUSH CURRENT IN UNIVERSAL SERIAL BUS CIRCUITS AND SYSTEMS
Methods, apparatus, systems and articles of manufacture are disclosed including a capacitor, located in a universal serial bus schematic. The methods, apparatus, systems and articles of manufacture include a controller, include a controller including a state machine and a control signal generator, w...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
23.11.2023
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Subjects | |
Online Access | Get full text |
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Summary: | Methods, apparatus, systems and articles of manufacture are disclosed including a capacitor, located in a universal serial bus schematic. The methods, apparatus, systems and articles of manufacture include a controller, include a controller including a state machine and a control signal generator, wherein the controller is configured to be coupled to a connector and to a power supply, the state machine is configured to determine a state of the connector, and the control signal generator is configured to, in response to an indication of a device not connected to the connector, generate a signal to indicate to the power supply to charge a capacitor to a threshold voltage, and wherein the control signal generator is further configured to generate the signal until a second state. |
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Bibliography: | Application Number: US202318364502 |