ANTI-FUSE ARRAY STRUCTURE, OPERATION METHOD THEREOF AND MEMORY

An anti-fuse array structure, an operation method thereof and a memory are provided. The anti-fuse array structure includes an anti-fuse array area and a selection circuit area. The anti-fuse array area includes a plurality of anti-fuse cells, and the selection circuit area includes a plurality of s...

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Bibliographic Details
Main Author HOU, Chuangming
Format Patent
LanguageEnglish
Published 09.11.2023
Subjects
ELECTRICITY
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:An anti-fuse array structure, an operation method thereof and a memory are provided. The anti-fuse array structure includes an anti-fuse array area and a selection circuit area. The anti-fuse array area includes a plurality of anti-fuse cells, and the selection circuit area includes a plurality of selection transistors. The selection circuit area is located on at least one side of the anti-fuse array area.
Bibliography:Application Number: US202318166018