LAYOUT METHOD FOR SEMICONDUCTOR CHIP, METHOD OF MANUFACTURING SEMICONDUCTOR CHIP USING THE SAME, AND COMPUTING DEVICE

A layout method for a semiconductor chip includes designing a layout; generating an aerial image based on the layout; determining a predicted scanning electron microscope (SEM) image based on the aerial image using a first machine learning model; determining a target SEM image based on the layout us...

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Bibliographic Details
Main Authors KIM, Donyun, KWAK, Nohong, KIM, Kihyun
Format Patent
LanguageEnglish
Published 09.11.2023
Subjects
APPARATUS SPECIALLY ADAPTED THEREFOR
CALCULATING
CINEMATOGRAPHY
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTROGRAPHY
HOLOGRAPHY
IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
MATERIALS THEREFOR
ORIGINALS THEREFOR
PHOTOGRAPHY
PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES
PHYSICS
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Summary:A layout method for a semiconductor chip includes designing a layout; generating an aerial image based on the layout; determining a predicted scanning electron microscope (SEM) image based on the aerial image using a first machine learning model; determining a target SEM image based on the layout using a second machine learning model; predicting a defect in the semiconductor chip based on a result of comparing the predicted SEM image with the target SEM image; and correcting the layout based on the predicted defect.
Bibliography:Application Number: US202318103868