SCALABLE PACKAGE ARCHITECTURE USING RETICLE STITCHING AND PHOTONICS FOR ZETTA-SCALE INTEGRATED CIRCUITS
Embodiments of a microelectronic assembly comprise a first integrated circuit (IC) die including a plurality of first circuits separated by scribe regions, and a plurality of second IC dies coupled to the first IC die, each one of the second IC dies being coupled proximate and adjacent to a correspo...
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Main Authors | , , , , |
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Format | Patent |
Language | English |
Published |
02.11.2023
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Subjects | |
Online Access | Get full text |
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Summary: | Embodiments of a microelectronic assembly comprise a first integrated circuit (IC) die including a plurality of first circuits separated by scribe regions, and a plurality of second IC dies coupled to the first IC die, each one of the second IC dies being coupled proximate and adjacent to a corresponding one of the first circuits and conductively coupled to the corresponding one of the first circuits. One or more of the second IC dies comprises a second circuit different from the first circuit, adjacent ones of the first circuits are coupled by a conductive pathway through the corresponding scribe regions, and the first IC die and the second IC die are coupled by interconnects having a pitch not more than 10 micrometers between adjacent interconnects. |
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Bibliography: | Application Number: US202217733880 |