THREE-DIMENSIONAL FAN-OUT MEMORY PACKAGE STRUCTURE AND PACKAGING METHOD THEREOF

• Main Authors: Chen, Yenheng, Lin, Chengchung
• Format: Patent
• Language: English
• Published: 02.11.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A three-dimensional fan-out memory package structure and a packaging method are disclosed. The package structure includes a three-dimensional fan-out memory package unit, which includes: a memory chip stack having at least two memory chips laminated in a stepped configuration, each memory chip is provided with a bonding pad; first metal connection pillars formed on the bonding pads; second metal connection pillars; a first encapsulating layer; a first rewiring layer formed on a back side of the memory chip stack; a second rewiring layer formed over a front side of the memory chip stack; and metal bumps. The package structure further includes: at least one peripheral circuit chip electrically connected with the first rewiring layer; and a second encapsulating layer, which encapsulates the peripheral circuit chip. The package structure allows for high-density and high-integration of line width/line spacing. The process time can be shortened, and the efficiency is high.