Dummy Metal-Insulator-Metal Structures Within Vias
Via array configurations for metal-insulator-metal (MIM) capacitor structures are disclosed herein. An exemplary MIM capacitor structure includes a capacitor bottom metal layer, a first dielectric layer over the capacitor bottom metal layer, a capacitor middle metal layer over the first dielectric l...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
02.11.2023
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Subjects | |
Online Access | Get full text |
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Summary: | Via array configurations for metal-insulator-metal (MIM) capacitor structures are disclosed herein. An exemplary MIM capacitor structure includes a capacitor bottom metal layer, a first dielectric layer over the capacitor bottom metal layer, a capacitor middle metal layer over the first dielectric layer, a second dielectric layer over the capacitor middle metal layer, and a capacitor top metal layer over the second dielectric layer. A metal via array, which has a first metal via and a second metal via, is connected to the capacitor top metal layer and the capacitor bottom metal layer. A portion of the capacitor top metal layer covers an area of the second dielectric layer extending from the first metal via to the second metal via. From a top view, the portion of the capacitor top metal layer surrounds the first metal via and the second metal via. |
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Bibliography: | Application Number: US202217901352 |