DUO-LEVEL WORD LINE DRIVER

A circuit includes a first transistor and a second transistor cross-coupled with each other such that a source of the first transistor and a source of the second transistor are connected to a power supply, a gate of the first transistor is connected to a drain of the second transistor at a first nod...

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Bibliographic Details
Main Authors Lee, Po-Hao, Lee, Chia-Fu, Shih, Yi-Chun
Format Patent
LanguageEnglish
Published 26.10.2023
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A circuit includes a first transistor and a second transistor cross-coupled with each other such that a source of the first transistor and a source of the second transistor are connected to a power supply, a gate of the first transistor is connected to a drain of the second transistor at a first node, a gate of the second transistor is connected to a drain of the first transistor at a second node. The circuit can provide a first level of a word line voltage to the memory cell by directly coupling the power supply configured at a first level to the memory cell through the second transistor and a third transistor, and provide a second level of the word line voltage by directly coupling the power supply configured at a second level to the memory cell through the second transistor and the third transistor.
Bibliography:Application Number: US202318345071