COVERED CAVITY FOR A PHOTONIC INTEGRATED CIRCUIT (PIC)

Covered cavity structure for Photonic integrated circuits (PICs) that include a micro-ring resonator (MRR) with a heater. Air cavities are etched or otherwise thinned into an overlaying oxide layer, a buried oxide layer, or an underlying silicon layer. Variations in size, shape, and location of the...

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Bibliographic Details
Main Authors Hosseini, Kaveh, Deshpande, Nitin A, Chiu, Chia-Pin, Karhade, Omkar G, Hoang, Tim T
Format Patent
LanguageEnglish
Published 26.10.2023
Subjects
OPTICAL ELEMENTS, SYSTEMS, OR APPARATUS
OPTICS
PHYSICS
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Summary:Covered cavity structure for Photonic integrated circuits (PICs) that include a micro-ring resonator (MRR) with a heater. Air cavities are etched or otherwise thinned into an overlaying oxide layer, a buried oxide layer, or an underlying silicon layer. Variations in size, shape, and location of the covered air cavity associated with an MRR provide customizable options for thermal management. A thin film across an upper surface covers the air cavity, providing a barrier to underfill in the air cavity and preventing interference of underfill with performance of silicon waveguides. When arrayed into a plurality of MRRs, the thin film can cover the plurality of MRRs.
Bibliography:Application Number: US202217725090