SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME

• Main Author: SEO, Wonil
• Format: Patent
• Language: English
• Published: 05.10.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises semiconductor chips stacked on a substrate and including first and second pads on top surfaces thereof, and bonding wires connecting the first and second pads to the substrate. The semiconductor chips alternately protrude in a first direction and its opposite direction. The semiconductor chip has a first lateral surface spaced apart from another semiconductor chip. The top surface of the semiconductor chip is provided thereon with a first arrangement line extending along the first lateral surface and with second arrangement lines extending from opposite ends of the first arrangement line. Wherein as a distance between the first and second arrangement lines increases, a distance between the second arrangement lines and the first lateral surface increases. The first pads are arranged along the first arrangement line. The second pads are arranged along the second arrangement lines.