INTEGRATED ERROR CORRECTION CODE (ECC) AND PARITY PROTECTION IN MEMORY CONTROL CIRCUITS FOR INCREASED MEMORY UTILIZATION

A codeword read from memory includes data blocks including data and supplemental blocks including error correction code (ECC) symbols for detecting and correcting data errors. Metadata can be stored in the supplemental blocks to increase memory utilization but using bits of the supplemental blocks f...

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Bibliographic Details
Main Authors Sutera, Massimo, Aboulenein, Nagi, Brahmadathan, Sandeep
Format Patent
LanguageEnglish
Published 05.10.2023
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A codeword read from memory includes data blocks including data and supplemental blocks including error correction code (ECC) symbols for detecting and correcting data errors. Metadata can be stored in the supplemental blocks to increase memory utilization but using bits of the supplemental blocks for metadata leaves too few bits remaining for the ECC symbols. To maintain error protection, the supplemental blocks include ECC symbols to protect a first data portion of the codeword and parity bits configured to protect a second data portion of the codeword. Errors in the first data portion can be located and corrected using the ECC symbols. Errors in the second data portion can be detected by the parity. For example, the first data portion is encoded based on the second data portion, so locations of parity errors correspond to locations of symbol errors, and parity errors can be corrected.
Bibliography:Application Number: US202217707636