SEMICONDUCTOR DEVICE INCLUDING STANDARD CELLS WITH COMBINED ACTIVE REGION
A semiconductor device includes a first power rail and a second power rail; a third power rail and a fourth power rail, the fourth power rail aligned with the third power rail in a column direction; a first cell arranged between the first power rail and the second power rail; a second cell arranged...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
28.09.2023
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Subjects | |
Online Access | Get full text |
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Summary: | A semiconductor device includes a first power rail and a second power rail; a third power rail and a fourth power rail, the fourth power rail aligned with the third power rail in a column direction; a first cell arranged between the first power rail and the second power rail; a second cell arranged between the first power rail and the third power rail; and a dummy fin structure extending in the row direction and overlapped with the fourth power rail, wherein the dummy fin structure is configured as a non-functional device. A first active region of the first cell includes a first width in the column direction greater than a second width, in the column direction, of a second active region in the second cell. |
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Bibliography: | Application Number: US202318327037 |