MEMORY DEVICE

A memory device includes a substrate, a three-dimensional (3D) NAND memory cell array on the substrate, and a peripheral circuit including a transistor on the substrate. The substrate includes p-type impurities and n-type impurities, a concentration of the n-type impurities in the substrate is lower...

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Bibliographic Details
Main Authors Choi, Samjong, Kim, Yehwan, Baek, Gayeong, Im, Hwon, Kim, Yeonsook, Kim, Euido, Kim, Cheongjun, Lee, Munkeun
Format Patent
LanguageEnglish
Published 21.09.2023
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
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Summary:A memory device includes a substrate, a three-dimensional (3D) NAND memory cell array on the substrate, and a peripheral circuit including a transistor on the substrate. The substrate includes p-type impurities and n-type impurities, a concentration of the n-type impurities in the substrate is lower than a concentration of the p-type impurities in the substrate, and the concentration of the n-type impurities in the substrate is about 2×1014 atoms/cm3 to about 1.5×1015 atoms/cm3 while the concentration of the p-type impurities in the substrate is about 9×1014 atoms/cm3 to about 2×1015 atoms/cm3.
Bibliography:Application Number: US202218051907