MOS TRANSISTOR ON SOI STRUCTURE

A device includes an active semiconductor layer on top of and in contact with an insulating layer which overlies a semiconductor substrate. A transistor for the device includes a source region, a drain region, and a body region arranged in the active semiconductor layer. The body region of the trans...

Full description

Saved in:
Bibliographic Details
Main Authors HAENDLER, Sebastien, MONSIEUR, Frederic, CREMER, Sebastien, FLEURY, Alain
Format Patent
LanguageEnglish
Published 14.09.2023
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:A device includes an active semiconductor layer on top of and in contact with an insulating layer which overlies a semiconductor substrate. A transistor for the device includes a source region, a drain region, and a body region arranged in the active semiconductor layer. The body region of the transistor is electrically coupled to the semiconductor substrate using a conductive via that crosses through the insulating layer.
Bibliography:Application Number: US202318118391