MEMORY AND READING METHOD THEREOF
A memory, including a selected memory cell block and a first sense amplifying device, is provided. The selected memory cell block and the first sense amplifying device are both coupled to a first global bit line. The first sense amplifying device is configured to: in a leakage current detection mode...
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Main Author | |
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Format | Patent |
Language | English |
Published |
14.09.2023
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Subjects | |
Online Access | Get full text |
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Summary: | A memory, including a selected memory cell block and a first sense amplifying device, is provided. The selected memory cell block and the first sense amplifying device are both coupled to a first global bit line. The first sense amplifying device is configured to: in a leakage current detection mode, detect a leakage current of the selected memory cell block on a first global bit line to generate leakage current information; and in a data reading mode, provide a reference signal according to the leakage current information, and compare a readout signal on the first global bit line with the reference signal to generate readout data, wherein the leakage current detection mode happens before the data reading mode. |
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Bibliography: | Application Number: US202217693411 |