MULTILEVEL SEMICONDUCTOR DEVICE AND STRUCTURE WITH IMAGE SENSORS AND WAFER BONDING
An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlying oxide disposed on top of the first level; a second level including a second mono-crystal layer, the second le...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
31.08.2023
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Subjects | |
Online Access | Get full text |
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Summary: | An integrated device, the device including: a first level including a first mono-crystal layer, the first mono-crystal layer including a plurality of single crystal transistors; an overlying oxide disposed on top of the first level; a second level including a second mono-crystal layer, the second level overlaying the oxide, where the second mono-crystal layer includes a plurality of image sensors, where the second level is bonded to the first level, where the bonded includes an oxide to oxide bond; and a plurality of pixel control circuits, where each of the plurality of image sensors is directly connected to at least one of the plurality of pixel control circuits, and where the integrated device includes a plurality of memory circuits. |
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Bibliography: | Application Number: US202318141975 |