ULTRA-LOW LEAKAGE DIODES USED FOR LOW INPUT BIAS CURRENT

In an example, a device includes a semiconductor substrate having a top surface. The device also includes a P-doped well formed in the semiconductor substrate and extending downwardly from the top surface. The device includes a cathode of a diode formed by an N-doped region in the P-doped well. The...

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Bibliographic Details
Main Authors VASAN, Bharath Karthik, SUDANI, Siva Kumar, WANG, YuGuo, DOORENBOS, Jerry L, PULIJALA, Srinivas Kumar
Format Patent
LanguageEnglish
Published 31.08.2023
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Summary:In an example, a device includes a semiconductor substrate having a top surface. The device also includes a P-doped well formed in the semiconductor substrate and extending downwardly from the top surface. The device includes a cathode of a diode formed by an N-doped region in the P-doped well. The device also includes an anode of the diode formed by a P-doped region, the P-doped region spaced away from the N-doped region in the P-doped well. The device includes a deep N-type buried layer (DNBL) formed in the semiconductor substrate, the P-doped well formed between the top surface and the DNBL. The device also includes an N-doped well extending from the top surface to the DNBL.
Bibliography:Application Number: US202217681664