DIE TO DIE INTERFACE CIRCUIT

Disclosed herein are related to an integrated circuit including multiple dies stacked along a direction. In one aspect, the integrated circuit includes a first die, a second die, and a third die stacked along the direction. In one aspect, the first die includes a first interface circuit to generate...

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Bibliographic Details
Main Authors Liu, Yu-Hao, Tam, King-Ho, Huang, Tze-Chiang
Format Patent
LanguageEnglish
Published 17.08.2023
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Disclosed herein are related to an integrated circuit including multiple dies stacked along a direction. In one aspect, the integrated circuit includes a first die, a second die, and a third die stacked along the direction. In one aspect, the first die includes a first interface circuit to generate a signal. In one aspect, the second die includes a second interface circuit to receive the signal from the first interface circuit and generate a replicate signal of the signal. In one aspect, the third die includes a third interface circuit to receive the replicate signal from the second interface circuit.
Bibliography:Application Number: US202318301817