TIMER CIRCUIT
A timer circuit including a ramp voltage generator configured to generate a ramp voltage, a comparator coupled on its input side to the ramp voltage generator to receive the ramp voltage and configured to compare the ramp voltage with a switching threshold, and a voltage pulse generating circuit con...
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Main Author | |
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Format | Patent |
Language | English |
Published |
27.07.2023
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Subjects | |
Online Access | Get full text |
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Summary: | A timer circuit including a ramp voltage generator configured to generate a ramp voltage, a comparator coupled on its input side to the ramp voltage generator to receive the ramp voltage and configured to compare the ramp voltage with a switching threshold, and a voltage pulse generating circuit configured to generate a reset signal as a response to a received output signal of the comparator, wherein the reset signal has a shorter time duration than an intrinsic reset time duration of the comparator. |
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Bibliography: | Application Number: US202318156510 |