PERFORMANCE THROTTLING MODULE

Provided is a method for regulating, via a hardware performance throttling block (PTB) of a memory module, the performance of a memory system in response to read and write requests from a processing system which hosts the memory system. The host system sends memory service requests to the memory sys...

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Bibliographic Details
Main Authors CONFANOLIERI, Emanuele, DEL GATTO, Nicola, CRESCI, Federica
Format Patent
LanguageEnglish
Published 27.07.2023
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Provided is a method for regulating, via a hardware performance throttling block (PTB) of a memory module, the performance of a memory system in response to read and write requests from a processing system which hosts the memory system. The host system sends memory service requests to the memory system in the form of memory read requests and memory write requests. The host system may also send requests to throttle, that is, to limit the responses of the memory system in response to memory requests; the host system may also send to the memory system various parameters indicative of current memory usage. In response to the throttling request, the PTB of the memory module either stops any reception of memory requests, or limits (throttles) the number of memory requests (either read requests, write requests, or both) for a specified number of clock/command cycles. The PTB also determines when full, un-throttled performance may be resumed.
Bibliography:Application Number: US202217902716