PACKAGE SUBSTRATES WITH EMBEDDED DIE-SIDE, FACE-UP DEEP TRENCH CAPACITOR(S) (DTC(s)), AND RELATED INTEGRATED CIRCUIT (IC) PACKAGES AND FABRICATION METHODS

• Main Authors: Kim, Michelle Yejin, Choi, Seongryul, Kang, Kuiwon
• Format: Patent
• Language: English
• Published: 06.07.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Integrated circuit (IC) packages employing a package substrate with embedded deep trench capacitor(s) (DTC(s)) face-up to a semiconductor die ("die") for connection, and related fabrication methods. A DTC is embedded in a cavity in the package substrate and coupled to a die. To minimize connection path length between the DTC and the die to reduce impedance and improve capacitor performance, the DTC is disposed in a cavity in the package substrate face-up towards the die. The DTC interconnects of the DTC are oriented face-up towards the die in a vertical direction. Also, to minimize connection path length between the DTC and the die, the DTC can be disposed in the package substrate underneath the die in the vertical direction. The DTC interconnects can be disposed in a die-side metallization layer of the package substrate and coupled to external, die-side interconnects of the package substrate.