ADDRESS VERIFICATION FOR DIRECT MEMORY ACCESS REQUESTS
An example apparatus can receive a DMA request from a device, where the DMA request comprises an address and an ID of the device that uniquely identifies the device and wherein the device is a bus mastering device. The example apparatus can access a range of addresses using the ID of the device. An...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
22.06.2023
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Subjects | |
Online Access | Get full text |
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Summary: | An example apparatus can receive a DMA request from a device, where the DMA request comprises an address and an ID of the device that uniquely identifies the device and wherein the device is a bus mastering device. The example apparatus can access a range of addresses using the ID of the device. An example apparatus can determine whether the address is in the range of addresses and can process the DMA request responsive to verifying that the address is in the range of addresses. |
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Bibliography: | Application Number: US201816966314 |