REGISTER INTERFACE FOR COMPUTER PROCESSOR

In an embodiment, a processor may include at least one processing engine to execute instructions, and a register interface circuit coupled to the at least one processing engine. The register interface circuit may be to: receive a request to access a register associated with a feature of the processo...

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Bibliographic Details
Main Authors van de Groenendaal, Johan, Garg, Vivek, Chen, Stanley, Varma, Ankush, Dehaemer, Eric J
Format Patent
LanguageEnglish
Published 22.06.2023
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Summary:In an embodiment, a processor may include at least one processing engine to execute instructions, and a register interface circuit coupled to the at least one processing engine. The register interface circuit may be to: receive a request to access a register associated with a feature of the processor; determine whether the requested access is authorized based at least in part on an entry of an access structure, the access structure to store a plurality of entries associated with a plurality of features of the processor; and in response to a determination that the requested access is authorized by the access structure, perform the requested access of the register associated with the feature. Other embodiments are described and claimed.
Bibliography:Application Number: US202117645070