READ DISTURB CHECKING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT

A read disturb checking method, a memory storage device, and a memory control circuit unit are provided. The method includes: updating first and second read counts of a first physical unit group according to a total read count of a read operation performed on physical programming units in the first...

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Bibliographic Details
Main Authors Lin, Wei, Zeng, Shih-Jia, Su, Po-Cheng, Wang, Chih-Wei
Format Patent
LanguageEnglish
Published 22.06.2023
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A read disturb checking method, a memory storage device, and a memory control circuit unit are provided. The method includes: updating first and second read counts of a first physical unit group according to a total read count of a read operation performed on physical programming units in the first physical unit group; scanning at least one first physical programming unit in a currently read physical erasing unit in response to determining the first read account is greater than a first read count threshold to obtain a first error bit amount; scanning all physical programming units in at least one first physical erasing unit in the first physical unit group in response to determining the second read account is greater than a second read count threshold to obtain a second error bit amount; performing a read disturb prevention operation according to the first or second error bit amount.
Bibliography:Application Number: US202217577012