TWO TRANSISTOR MEMORY CELL USING STACKED THIN-FILM TRANSISTORS

Described herein are two transistor (2T) memory cells that use TFTs as access and gain transistors. When one or both transistors of a 2T memory cell are implemented as TFTs, these transistors may be provided in different layers above a substrate, enabling a stacked architecture. An example 2T memory...

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Bibliographic Details
Main Authors Lajoie, Travis W, Le, Van H, Sell, Bernhard, Ghani, Tahir, Arslan, Umut, Wang, Pei-hua, Alzate-Vinasco, Juan G, Ku, Chieh-jen, Sharma, Abhishek A, Kavalieros, Jack T, Hamzaoglu, Fatih
Format Patent
LanguageEnglish
Published 01.06.2023
Subjects
ELECTRICITY
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:Described herein are two transistor (2T) memory cells that use TFTs as access and gain transistors. When one or both transistors of a 2T memory cell are implemented as TFTs, these transistors may be provided in different layers above a substrate, enabling a stacked architecture. An example 2T memory cell includes an access TFT provided in a first layer over a substrate, and a gain TFT provided in a second layer over the substrate, the first layer being between the substrate and the second layer (i.e., the gain TFT is stacked in a layer above the access TFT). Stacked TFT based 2T memory cells allow increasing density of memory cells in a memory array having a given footprint area, or, conversely, reducing the footprint area of the memory array with a given memory cell density.
Bibliography:Application Number: US202318161915