SHARED PAD/BRIDGE LAYOUT FOR A 3D IC

• Main Authors: Liu, Chien Lin, Tu, Yung Chun, Chuang, Harry-Hak-Lay, Lin, Shun-Kuan, Wu, Wei Chuang, Wu, Wei Cheng, Chen, Ping-Tzu, Lin, Chia-Sheng, Huang, Chung-Jen, Huang, Wen-Tuo, Yang, Shih Kuang
• Format: Patent
• Language: English
• Published: 01.06.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Various embodiments of the present disclosure are directed towards a shared frontside pad/bridge layout for a three-dimensional (3D) integrated circuit (IC), as well as the 3D IC and a method for forming the 3D IC. A second IC die underlies the first IC die, and a third IC die underlies the second IC die. A first-die backside pad, a second-die backside pad, and a third die backside pad are in a row extending in a dimension and overlie the first, second, and third IC dies. Further, the first-die, second-die, and third-die backside pads are electrically coupled respectively to individual semiconductor devices of the first, second, and third IC dies. The second and third IC dies include individual pad/bridge structures at top metal (TM) layers of corresponding interconnect structures. The pad/bridge structures share the shared frontside pad/bridge layout and provide lateral routing in the dimension for the aforementioned electrical coupling.