APPARATUS AND METHOD TO OPTIMIZE SENSE-AMP ENABLE PULSE-WIDTH IN SRAM ARRAYS

Embodiments herein relate to optimizing the duration of a sense amp enable signal in a memory device such as SRAM. A control circuit asserts the sense amp enable signal in response to a clock signal from a replica column of the SRAM. A feedback path extends from the sense amps back to the control ci...

Full description

Saved in:
Bibliographic Details
Main Authors Salaka, Jagadeesh Chandra, Meinerzhagen, Pascal A, Kumar M., Naveen, Shamanna, Gururaj K, Puchakayala, Sravan K, Rajwani, Iqbal
Format Patent
LanguageEnglish
Published 20.04.2023
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:Embodiments herein relate to optimizing the duration of a sense amp enable signal in a memory device such as SRAM. A control circuit asserts the sense amp enable signal in response to a clock signal from a replica column of the SRAM. A feedback path extends from the sense amps back to the control circuit. In one approach, a change in a feedback signal on the feedback path indicates the sense amps have all received the sense amp enable signal. In another approach, a change in a feedback signal on the feedback path indicates the sense amps have all completed their sensing operations. In some cases, a selection can be made among multiple feedback paths.
Bibliography:Application Number: US202117504252