APPARATUS AND METHOD TO OPTIMIZE SENSE-AMP ENABLE PULSE-WIDTH IN SRAM ARRAYS
Embodiments herein relate to optimizing the duration of a sense amp enable signal in a memory device such as SRAM. A control circuit asserts the sense amp enable signal in response to a clock signal from a replica column of the SRAM. A feedback path extends from the sense amps back to the control ci...
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Main Authors | , , , , , |
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Format | Patent |
Language | English |
Published |
20.04.2023
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Subjects | |
Online Access | Get full text |
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Summary: | Embodiments herein relate to optimizing the duration of a sense amp enable signal in a memory device such as SRAM. A control circuit asserts the sense amp enable signal in response to a clock signal from a replica column of the SRAM. A feedback path extends from the sense amps back to the control circuit. In one approach, a change in a feedback signal on the feedback path indicates the sense amps have all received the sense amp enable signal. In another approach, a change in a feedback signal on the feedback path indicates the sense amps have all completed their sensing operations. In some cases, a selection can be made among multiple feedback paths. |
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Bibliography: | Application Number: US202117504252 |