DUTY CORRECTION DEVICE INCLUDING DUTY CORRECTION CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING DUTY CORRECTION DEVICE
A duty correction device includes a clock generation circuit, first and second correction pulse generation circuits, and a duty correction circuit. The clock generation circuit generates first to third divided clock signals, each having a phase offset from a reference clock signal. The first correct...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
13.04.2023
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Subjects | |
Online Access | Get full text |
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Summary: | A duty correction device includes a clock generation circuit, first and second correction pulse generation circuits, and a duty correction circuit. The clock generation circuit generates first to third divided clock signals, each having a phase offset from a reference clock signal. The first correction pulse generation circuit generates a first correction pulse by detecting a phase difference between a delayed clock signal and the first and second divided clock signals. The second correction pulse generation circuit generates a second correction pulse by detecting a phase difference between the second and third divided clock signals. The duty correction circuit checks whether the first and second correction pulses are generated at a preset logic level of the reference clock signal, and reflects the first or second correction pulses in a duty correction operation for the reference clock signal according to a result of the check. |
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Bibliography: | Application Number: US202217690932 |