Semiconductor Die, Semiconductor Device and Method for Forming a Semiconductor Die
A semiconductor die is provided. The semiconductor die comprises a plurality of transistors arranged at a front side of a semiconductor substrate and an electrically conductive structure. A top surface of the electrically conductive structure is contacted at the front side of the semiconductor subst...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
30.03.2023
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Subjects | |
Online Access | Get full text |
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Summary: | A semiconductor die is provided. The semiconductor die comprises a plurality of transistors arranged at a front side of a semiconductor substrate and an electrically conductive structure. A top surface of the electrically conductive structure is contacted at the front side of the semiconductor substrate and a bottom surface of the electrically conductive structure is contacted at a backside of the semiconductor substrate. Further, the semiconductor die comprises a backside metallization layer stack attached to the backside of the semiconductor substrate. A first portion of a wiring structure is formed in a first metallization layer of the backside metallization layer stack and a second portion of the wiring structure is formed in a second metallization layer of the backside metallization layer stack. Further, a tapered vertical connection is formed between the first portion of the wiring structure and the second portion of the wiring structure, wherein the first metallization layer is closer to the semiconductor substrate than the second metallization layer. A width of the tapered vertical connection increases towards the first metallization layer. |
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Bibliography: | Application Number: US202117448716 |