SELECTIVELY THINNED GATE-ALL-AROUND (GAA) STRUCTURES

• Main Authors: Hasan, Mohammad, Ghani, Tahir, Ong, Clifford L, Haran, Mohit K, Guler, Leonard P, Patel, Pratik A
• Format: Patent
• Language: English
• Published: 16.03.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Techniques are provided herein to form semiconductor devices having thinned semiconductor regions (e.g., thinner nanoribbons) compared to other semiconductor devices on the same substrate and at a comparable height (e.g., within same layer or adjacent layers). In an example, neighboring semiconductor devices of a given memory cell include a p-channel device and an n-channel device. The p-channel device may be a GAA transistor with a semiconductor nanoribbon having a first width while the n-channel device may be a GAA transistor with a semiconductor nanoribbon having a second width that is larger than the first width (e.g., first width is half the second width). The p-channel device may have a thinner width than the corresponding n-channel device in order to structurally lower the operating current through the p-channel devices by decreasing the width of the active semiconductor channel.