GATE TIE STRUCTURES TO BURIED OR BACKSIDE POWER RAILS
Techniques are provided herein to form semiconductor devices having gate tie-down structures between the device gate and a buried/backside power rail (BPR). In an example, a semiconductor device includes a conductive material that is part of a transistor gate structure on a semiconductor region. The...
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Main Author | |
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Format | Patent |
Language | English |
Published |
02.03.2023
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Subjects | |
Online Access | Get full text |
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Summary: | Techniques are provided herein to form semiconductor devices having gate tie-down structures between the device gate and a buried/backside power rail (BPR). In an example, a semiconductor device includes a conductive material that is part of a transistor gate structure on a semiconductor region. The semiconductor region can be, for example, a fin or a set of one or more nanowires or nanoribbons that extends between a source region and a drain region. A BPR structure is beneath a dielectric layer that is between the BPR structure and the conductive material of the gate structure. A portion of the conductive material also extends through the dielectric material to provide a conductive via between the gate structure and the underlying BPR structure. The conductive material may be, for example, work function and/or metal fill material of the gate electrode of the gate structure. |
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Bibliography: | Application Number: US202117446206 |