TRUE COMPLEMENT DYNAMIC CIRCUIT AND METHOD FOR COMBINING BINARY DATA
A true complement dynamic circuit for combining, in particular comparing, binary data on dynamic first and second input signals to third and fourth input signals, comprising at least a 1-bit compare circuit, wherein the dynamic first and second input signals are complementary signals during an evalu...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
02.03.2023
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Subjects | |
Online Access | Get full text |
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Summary: | A true complement dynamic circuit for combining, in particular comparing, binary data on dynamic first and second input signals to third and fourth input signals, comprising at least a 1-bit compare circuit, wherein the dynamic first and second input signals are complementary signals during an evaluation phase, wherein a logical behavior is determined by the third and fourth input signals. A method for operating a true complement dynamic circuit for combining, in particular comparing, binary data on dynamic first and second input signals to third and fourth input signals, comprising operating at least a 1-bit compare circuit, wherein the dynamic first and second input signals are complementary signals during an evaluation phase, determining a logical behavior by the third and fourth input signals. |
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Bibliography: | Application Number: US202217807149 |