Method for determining corrective film pattern to reduce semiconductor wafer bow

A method is disclosed for generating a corrective film pattern for reducing wafer bow in a semiconductor wafer fabrication process. The method inputs to a neural network a wafer bow signature for a predetermined semiconductor fabrication step. The neural network generates from the input a corrective...

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Bibliographic Details
Main Authors Stoddard, Ryan J, Herlocker, Jonathan L, McLaughlin, Matt
Format Patent
LanguageEnglish
Published 29.12.2022
Subjects
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
COMPUTING
COUNTING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PHYSICS
SEMICONDUCTOR DEVICES
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Summary:A method is disclosed for generating a corrective film pattern for reducing wafer bow in a semiconductor wafer fabrication process. The method inputs to a neural network a wafer bow signature for a predetermined semiconductor fabrication step. The neural network generates from the input a corrective film pattern corresponding to the wafer bow signature. The neural network is trained with a training dataset of wafer shape transformations and corresponding corrective film patterns.
Bibliography:Application Number: US202117359626