THREE-DIMENSIONAL MEMORY DEVICE WITH ISOLATED SOURCE STRIPS AND METHOD OF MAKING THE SAME

A memory die includes source-select-level electrically conductive strips laterally spaced apart by source-select-level dielectric isolation structures, an alternating stack of word-line-level electrically conductive layers and insulating layers; and source strips located on an opposite side of the s...

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Bibliographic Details
Main Authors NISHIDA, Akio, TSUTSUMI, Masanori, IWAI, Takaaki
Format Patent
LanguageEnglish
Published 20.10.2022
Subjects
ELECTRICITY
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A memory die includes source-select-level electrically conductive strips laterally spaced apart by source-select-level dielectric isolation structures, an alternating stack of word-line-level electrically conductive layers and insulating layers; and source strips located on an opposite side of the source-select-level electrically conductive strips. Each of the source strips has an areal overlap with only a respective one of the source-select-level electrically conductive strips. Memory stack structures vertically extend through the alternating stack and a respective subset of the source-select-level electrically conductive strips. A logic die may be bonded to the memory die on an opposite side of the source strips. Each source strip is electrically connected to a respective group of memory stack structures laterally surrounded by a respective source-select-level electrically conductive strip.
Bibliography:Application Number: US202117232209