SELECTION OF PROCESSING MODE FOR RECEIVER CIRCUIT

In an embodiment, an apparatus includes a receiver circuit to: in response to a determination that the receiver circuit is in a high latency processing mode, transmit a hint signal to a transmitter circuit; receive a response message from the transmitter circuit; process the response message to redu...

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Bibliographic Details
Main Authors Jen, Michelle, Choudhary, Swadesh, Das Sharma, Debendra
Format Patent
LanguageEnglish
Published 29.09.2022
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:In an embodiment, an apparatus includes a receiver circuit to: in response to a determination that the receiver circuit is in a high latency processing mode, transmit a hint signal to a transmitter circuit; receive a response message from the transmitter circuit; process the response message to reduce a current workload of the receiver circuit; and switch the receiver circuit from the high latency processing mode to a low latency processing mode. Other embodiments are described and claimed.
Bibliography:Application Number: US202117645828