COMPENSATION CIRCUIT AND METHOD FOR FREQUENCY DIVIDER CIRCUIT

A counter signal counting at a frequency of a clock signal is generated. Among a plurality of different numeric ranges corresponding to a plurality of different thresholds, a threshold corresponding to a numeric range containing a frequency ratio is selected. In response to the counter signal reachi...

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Bibliographic Details
Main Authors CHANG, Chih-Hsien, CHOU, Mao-Hsuan, SHEEN, Ruey-Bin
Format Patent
LanguageEnglish
Published 15.09.2022
Subjects
AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
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Summary:A counter signal counting at a frequency of a clock signal is generated. Among a plurality of different numeric ranges corresponding to a plurality of different thresholds, a threshold corresponding to a numeric range containing a frequency ratio is selected. In response to the counter signal reaching the selected threshold, a logic level of an output signal is switched.
Bibliography:Application Number: US202217829044