EPITAXY METROLOGY IN FIN FIELD EFFECT TRANSISTORS

There is provided a system and method of performing a measurement with respect to an epitaxy formed in a finFET, the epitaxy being separated with at least one adjacent epitaxy by at least one HK fin. The method comprises obtaining an image of the epitaxy and the at least one HK fin, and a gray level...

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Bibliographic Details
Main Authors FRISHMAN, Einat, CHAUDHARY, Jitendra Pradipkumar, KRIS, Roman, LEVIN, Sahar, ALKOKEN, Ran, CHANG, Chih-Chieh
Format Patent
LanguageEnglish
Published 18.08.2022
Subjects
BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
PHYSICS
SEMICONDUCTOR DEVICES
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Summary:There is provided a system and method of performing a measurement with respect to an epitaxy formed in a finFET, the epitaxy being separated with at least one adjacent epitaxy by at least one HK fin. The method comprises obtaining an image of the epitaxy and the at least one HK fin, and a gray level (GL) profile indicative of GL distribution of the image; detecting edges of the at least one HK fin; determining two inflection points of the GL profile within an area of interest in the image; performing a critical dimension (CD) measurement between the two inflection points; determining whether to apply correction to the CD measurement based on a GL ratio indicative of a relative position between the epitaxy and the at least one HK fin; and applying correction to the CD measurement upon the GL ratio meeting a predetermined criterion.
Bibliography:Application Number: US202117177119