MASSIVE TESTING OF MICRO INTEGRATED CIRCUIT

A massive testing system of a micro integrated circuit includes: a first test area including a plurality of test pads and a plurality of reading pads, and disposed on scribe lines; a plurality of test controllers disposed on the scribe lines one by one; and a probe configured to contact the first te...

Full description

Saved in:
Bibliographic Details
Main Authors CHANG, Yuan-Tai, HUANG, Li-Chun
Format Patent
LanguageEnglish
Published 23.06.2022
Subjects
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
Online AccessGet full text

Cover

More Information
Summary:A massive testing system of a micro integrated circuit includes: a first test area including a plurality of test pads and a plurality of reading pads, and disposed on scribe lines; a plurality of test controllers disposed on the scribe lines one by one; and a probe configured to contact the first test area to test a plurality of rows of integrated circuit chips; wherein each of the plurality of test controllers is configured to test a respective one of the plurality of rows of integrated circuit chips row by row; wherein the probe merely contacts the first test area once; wherein the plurality of reading pads are configured to read test results of each of the plurality of rows of integrated circuit chips row by row.
Bibliography:Application Number: US202017132471