STRAINED GATE SEMICONDUCTOR DEVICE WITH DOPED INTERLAYER DIELECTRIC MATERIAL

A semiconductor includes a gate stack over a substrate. The semiconductor device further includes an interlayer dielectric (ILD) at least partially enclosing the gate stack. The ILD includes a portion doped with a large species material, wherein the portion includes a first sidewall substantially pe...

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Bibliographic Details
Main Authors LIN, Kun-Tzu, CHANG, Lan-Fang, WU, Cheng-Ta, JANGJIAN, Shiu-Ko, WU, Chii-Ming
Format Patent
LanguageEnglish
Published 26.05.2022
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A semiconductor includes a gate stack over a substrate. The semiconductor device further includes an interlayer dielectric (ILD) at least partially enclosing the gate stack. The ILD includes a portion doped with a large species material, wherein the portion includes a first sidewall substantially perpendicular to a top-most surface of the ILD, and the portion includes a second sidewall having a positive angle with respect to the first sidewall.
Bibliography:Application Number: US202217669317