STATIC RANDOM ACCESS MEMORY (SRAM) DEVICES AND METHODS OF OPERATING THE SAME
An integrated circuit memory device includes a static random access memory (SRAM) cell, and a charge storing circuit electrically coupled to the SRAM cell. A switching controller is provided, which is electrically coupled to the charge storing circuit. The switching controller and the charge storing...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
28.04.2022
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Subjects | |
Online Access | Get full text |
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Summary: | An integrated circuit memory device includes a static random access memory (SRAM) cell, and a charge storing circuit electrically coupled to the SRAM cell. A switching controller is provided, which is electrically coupled to the charge storing circuit. The switching controller and the charge storing circuit are collectively configured to save power by recycling charge associated with a bit line electrically coupled to the SRAM cell by: (i) transferring charge from the bit line to a charge storage node electrically coupled to source terminals of a pair of NMOS pull-down transistors within the SRAM cell upon commencement of a SRAM cell write operation, and then (ii) returning at least a portion of the charge to the bit line upon completion of the SRAM cell write operation. |
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Bibliography: | Application Number: US202117332004 |