SELF-ALIGNED SUPERVIA AND METAL DIRECT ETCHING PROCESS TO MANUFACTURE SELF-ALIGNED SUPERVIA
A semiconductor device structure includes: at least one inter-metal layer stacked in a vertical direction; and a 1st via structure penetrating the at least one inter-metal layer, wherein, in the at least one inter-metal layer, a 1st vertical side of the 1st via structure does not contact a barrier m...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
07.04.2022
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Subjects | |
Online Access | Get full text |
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Summary: | A semiconductor device structure includes: at least one inter-metal layer stacked in a vertical direction; and a 1st via structure penetrating the at least one inter-metal layer, wherein, in the at least one inter-metal layer, a 1st vertical side of the 1st via structure does not contact a barrier metal pattern while a 2nd vertical side of the 1st via structure opposite to the 1st vertical side of the 1st via structure contacts the barrier metal pattern. |
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Bibliography: | Application Number: US202117150557 |