Integrated Assemblies having Transistors Configured for High-Voltage Applications, and Methods of Forming Integrated Assemblies
Some embodiments include an integrated assembly having a first gate operatively adjacent a channel region, a first source/drain region on a first side of the channel region, and a second source/drain region on an opposing second side of the channel region. The first source/drain region is spaced fro...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
06.01.2022
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Subjects | |
Online Access | Get full text |
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Summary: | Some embodiments include an integrated assembly having a first gate operatively adjacent a channel region, a first source/drain region on a first side of the channel region, and a second source/drain region on an opposing second side of the channel region. The first source/drain region is spaced from the channel region by an intervening region. The first and second source/drain regions are gatedly coupled to one another through the channel region. A second gate is adjacent a segment of the intervening region and is spaced from the first gate by an insulative region. A lightly-doped region extends across the intervening region and is under at least a portion of the first source/drain region. Some embodiments include methods of forming integrated assemblies. |
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Bibliography: | Application Number: US202016919520 |