SYSTEM-ON-CHIP HAVING A MERGED FRAME RATE CONVERTER AND VIDEO CODEC AND FRAME RATE CONVERTING METHOD THEREOF

A system-on-chip which includes a video codec including a deblocking filter includes a motion estimator that calculates a motion vector of an input image, a motion compensator that compensates for a motion of the input image by using the motion vector, and a parameter generator that allows image dat...

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Main Authors AN, Jeehoon, BYUN, Juwon
Format Patent
LanguageEnglish
Published 09.12.2021
Subjects
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
PICTORIAL COMMUNICATION, e.g. TELEVISION
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Abstract A system-on-chip which includes a video codec including a deblocking filter includes a motion estimator that calculates a motion vector of an input image, a motion compensator that compensates for a motion of the input image by using the motion vector, and a parameter generator that allows image data, in which the motion is compensated, to be transferred to and filtered by the deblocking filter of the video codec.
AbstractList A system-on-chip which includes a video codec including a deblocking filter includes a motion estimator that calculates a motion vector of an input image, a motion compensator that compensates for a motion of the input image by using the motion vector, and a parameter generator that allows image data, in which the motion is compensated, to be transferred to and filtered by the deblocking filter of the video codec.
Author BYUN, Juwon
AN, Jeehoon
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Snippet A system-on-chip which includes a video codec including a deblocking filter includes a motion estimator that calculates a motion vector of an input image, a...
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SubjectTerms ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
PICTORIAL COMMUNICATION, e.g. TELEVISION
Title SYSTEM-ON-CHIP HAVING A MERGED FRAME RATE CONVERTER AND VIDEO CODEC AND FRAME RATE CONVERTING METHOD THEREOF
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