SYSTEM-ON-CHIP HAVING A MERGED FRAME RATE CONVERTER AND VIDEO CODEC AND FRAME RATE CONVERTING METHOD THEREOF

A system-on-chip which includes a video codec including a deblocking filter includes a motion estimator that calculates a motion vector of an input image, a motion compensator that compensates for a motion of the input image by using the motion vector, and a parameter generator that allows image dat...

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Bibliographic Details
Main Authors AN, Jeehoon, BYUN, Juwon
Format Patent
LanguageEnglish
Published 09.12.2021
Subjects
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
PICTORIAL COMMUNICATION, e.g. TELEVISION
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Summary:A system-on-chip which includes a video codec including a deblocking filter includes a motion estimator that calculates a motion vector of an input image, a motion compensator that compensates for a motion of the input image by using the motion vector, and a parameter generator that allows image data, in which the motion is compensated, to be transferred to and filtered by the deblocking filter of the video codec.
Bibliography:Application Number: US202117408589