METHOD FOR PRODUCING A 3D SEMICONDUCTOR MEMORY DEVICE AND STRUCTURE

• Main Authors: Or-Bach, Zvi, Sekar, Deepak C
• Format: Patent
• Language: English
• Published: 02.12.2021
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A method for producing a 3D memory device, the method including: providing a first level including a single crystal layer and first alignment marks; forming memory control circuits including first single crystal transistors, where the first single crystal transistors include portions of the single crystal layer; forming at least one second level above the first level; performing a first etch step including etching lithography windows within the at least one second level; performing a first lithographic step over the at least one second level aligned to the first alignment marks; and performing additional processing steps to form a plurality of first memory cells within the at last one second level, where each of the plurality of first memory cells include one of a plurality of second transistors, and where the plurality of second transistors are aligned to the first alignment marks with a less than 40 nm alignment error.