Giga Interposer Integration through Chip-On-Wafer-On-Substrate

A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second in...

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Main Authors Huang, Ping-Kang, Hou, Shang-Yun, Chiu, Sao-Ling, Yu, Chen-Hua, Lu, Szu-Wei, Wei, Wen-Hsin, Chiou, Wen-Chih, Wu, Chi-Hsi, Shen, Chih-Ta, Hu, Hsien-Pin, Shih, Ying-Ching
Format Patent
LanguageEnglish
Published 25.11.2021
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Summary:A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.
Bibliography:Application Number: US202016881211