LITHOGRAPHY SIMULATION METHOD

In a method of optimizing a lithography model in a lithography simulation, a mask is formed in accordance with a given layout, a wafer is printed using the mask, a pattern formed on the printed wafer is measured, a wafer pattern is simulated using a wafer edge bias table and the given mask layout, a...

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Bibliographic Details
Main Authors TIEN, Fu An, HUANG, Hsu-Ting, LO, Shih-Hsiang, LIU, Ru-Gun
Format Patent
LanguageEnglish
Published 18.11.2021
Subjects
APPARATUS SPECIALLY ADAPTED THEREFOR
CALCULATING
CINEMATOGRAPHY
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTROGRAPHY
HOLOGRAPHY
INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIRCHEMICAL OR PHYSICAL PROPERTIES
MATERIALS THEREFOR
MEASURING
ORIGINALS THEREFOR
PHOTOGRAPHY
PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES
PHYSICS
TESTING
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Summary:In a method of optimizing a lithography model in a lithography simulation, a mask is formed in accordance with a given layout, a wafer is printed using the mask, a pattern formed on the printed wafer is measured, a wafer pattern is simulated using a wafer edge bias table and the given mask layout, a difference between the simulated wafer pattern and the measured pattern is obtained, and the wafer edge table is adjusted according to the difference.
Bibliography:Application Number: US202117390833