Packaged Semiconductor Device With Multilayer Stress Buffer
In a described example, a packaged semiconductor device includes: a semiconductor die with a component proximate to a surface of the semiconductor die; the semiconductor die mounted on a substrate. The component is covered with a first polymer layer with a first modulus and at least a portion of the...
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Main Author | |
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Format | Patent |
Language | English |
Published |
11.11.2021
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Subjects | |
Online Access | Get full text |
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Summary: | In a described example, a packaged semiconductor device includes: a semiconductor die with a component proximate to a surface of the semiconductor die; the semiconductor die mounted on a substrate. The component is covered with a first polymer layer with a first modulus and at least a portion of the first polymer layer is covered by at least one second polymer layer with a second modulus and the second modulus is greater than the first modulus. The semiconductor die and a portion of the substrate are covered with mold compound. |
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Bibliography: | Application Number: US202117317795 |