UNIFIED ARCHITECTURAL DESIGN FOR ENHANCED 3D CIRCUIT OPTIONS

A method of forming a semiconductor device is presented. A layer stack of alternating epitaxial materials including one or more layers is formed. The layer stack of alternating epitaxial materials into a first region of nano sheets and a second region of nano sheets is divided. A first field effect...

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Bibliographic Details
Main Authors FULFORD, H. Jim, GARDNER, Mark I
Format Patent
LanguageEnglish
Published 07.10.2021
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method of forming a semiconductor device is presented. A layer stack of alternating epitaxial materials including one or more layers is formed. The layer stack of alternating epitaxial materials into a first region of nano sheets and a second region of nano sheets is divided. A first field effect transistor on a working surface of a substrate using the nano sheets in the first region of nano sheets is formed. A stack of field effect transistors on the working surface of the substrate using the nano sheets in the second region of nano sheets is formed.
Bibliography:Application Number: US202017109860