Additive Manufacturing of a Frontside or Backside Interconnect of a Semiconductor Die

A method for fabricating a semiconductor die package includes: providing a semiconductor transistor die, the semiconductor transistor die having a first contact pad on a first lower main face and/or a second contact pad on an upper main face; fabricating a frontside electrical conductor onto the sec...

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Bibliographic Details
Main Authors Nikitin, Ivan, Fuergut, Edward, Gruber, Martin, Schulze, Hans-Joachim, Escher-Poeppel, Irmgard
Format Patent
LanguageEnglish
Published 22.07.2021
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method for fabricating a semiconductor die package includes: providing a semiconductor transistor die, the semiconductor transistor die having a first contact pad on a first lower main face and/or a second contact pad on an upper main face; fabricating a frontside electrical conductor onto the second contact pad and a backside electrical conductor onto the first contact pad; and applying an encapsulant covering the semiconductor die and at least a portion of the electrical conductor, wherein the frontside electrical conductor and/or the backside electrical conductor is fabricated by laser-assisted structuring of a metallic structure.
Bibliography:Application Number: US202117149891