POISONED METAL LAYER WITH SLOPED SIDEWALL FOR MAKING DUAL DAMASCENE INTERCONNECT

A method of making a dual damascene interconnect includes operations of depositing a metal hardmask over a dielectric layer; etching a metal hardmask opening in the metal hardmask to expose a top surface of the dielectric layer; etching at least one interconnect opening in the dielectric layer, to e...

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Bibliographic Details
Main Authors TSAO, Jung-Chih, HSU, Min Han, CHEN, Chun-Chang
Format Patent
LanguageEnglish
Published 08.07.2021
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method of making a dual damascene interconnect includes operations of depositing a metal hardmask over a dielectric layer; etching a metal hardmask opening in the metal hardmask to expose a top surface of the dielectric layer; etching at least one interconnect opening in the dielectric layer, to expose a top surface of a base conductive layer; modifying a sidewall of the metal hardmask opening; and depositing a conductive material in the metal hardmask opening and the at least one interconnect opening.
Bibliography:Application Number: US202016801706